The present invention relates generally to the fabrication of semiconductor devices, and more particularly to the fabrication of magnetic random access memory (MRAM) devices.
Semiconductors are widely used for integrated circuits for electronic applications, including radios, televisions, cell phones, and personal computing devices, as examples. One type of semiconductor device is a semiconductor storage device, such as a dynamic random access memory (DRAM) and flash memory, which use a charge to store information.
Spin electronics combines semiconductor technology and magnetics, and is a more recent development in memory devices. In spin electronics, the spin of an electron, rather than the charge, is used to indicate the presence of a xe2x80x9c1xe2x80x9d or xe2x80x9c0xe2x80x9d. One such spin electronic device is an MRAM device, which includes conductive lines positioned in different directions to one another in different metal layers, the conductive lines sandwiching a magnetic stack. The place where the conductive lines, e.g., wordlines and bitlines, intersect is called a cross-point. A current flowing through one of the conductive lines generates a magnetic field around the conductive line and orients the magnetic polarity into a certain direction along the wire or conductive line. A current flowing through the other conductive line induces the magnetic field and can partially turn the magnetic polarity, also. Digital information, represented as a xe2x80x9c0xe2x80x9d or xe2x80x9c1xe2x80x9d, is storable in the alignment of magnetic moments. The resistance of the magnetic component depends on the moment""s alignment. The stored state is read from the element by detecting the component""s resistive state. A memory cell array is generally constructed by placing the conductive lines and cross-points in a matrix structure having rows and columns.
An advantage of MRAM devices compared to traditional semiconductor memory devices such as DRAM devices is that MRAM devices are non-volatile. For example, a personal computer (PC) utilizing MRAM devices would not have a long xe2x80x9cboot-upxe2x80x9d time as with conventional PCs that utilize DRAM devices. Also, an MRAM device does not need to be powered up and has the capability of xe2x80x9crememberingxe2x80x9d the stored data. MRAM devices have the potential to eliminate the boot up process, store more data, access that data faster and use less power than current memory technologies.
Because MRAM devices operate differently than traditional memory devices, they introduce design and manufacturing challenges.
Preferred embodiments of the present invention achieve technical advantages by providing material combinations that optimize etch processes for resistive memory elements. In the preferred embodiment, for example, the material tungsten nitride (WN) is used for the tunnel junction hard mask or cap layer, and/or the tunnel junction stack seed layer of an MRAM device.
In one embodiment, a method of fabricating a resistive semiconductor memory device includes providing a workpiece, forming a first inter-level dielectric over the workpiece, and disposing a plurality of first conductive lines within the first inter-level dielectric. The method also includes forming a seed layer over the first conductive lines, forming a first magnetic layer over the seed layer, and forming a tunnel barrier layer over the first magnetic layer. A second magnetic layer is deposited over the tunnel barrier, a cap layer is deposited over the second magnetic layer, and a hard mask material is deposited over the cap layer. The method includes patterning the hard mask material to form a hard mask, and using the patterned hard mask to pattern the cap layer, second magnetic layer, and tunnel barrier layer to form a plurality of tunnel junctions. At least one of depositing a cap layer, depositing a hard mask material or depositing a seed layer comprise depositing WN.
In another embodiment, a resistive semiconductor memory device includes a plurality of first conductive lines, a seed layer disposed over at least a portion of the first conductive lines, and a first magnetic stack disposed over the seed layer. A tunnel barrier is disposed over the first magnetic stack, a second magnetic stack disposed over the tunnel barrier, and a cap layer is disposed over the second magnetic stack, wherein at least one of the seed layer and the cap layer comprise WN.
Advantages of embodiments of the invention include improvement of the process window for the tunnel junction hard mask open reactive ion etch (RIE) process and subsequent tunnel junction etch with an optional etch stop on a seed layer to prevent corrosion of the metal of the first conductive lines.